A robust batch Bayesian optimization for analog circuit synthesis via local penalization
Published in In the proceedings of Proceedings of the 26th Asia and South Pacific Design Automation Conference, 2021
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Recommended citation: Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "A robust batch Bayesian optimization for analog circuit synthesis via local penalization." In the proceedings of Proceedings of the 26th Asia and South Pacific Design Automation Conference, 2021.