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Statistical reliability analysis under process variation and aging effects

Published in In the proceedings of Proceedings of the 46th Annual Design Automation Conference, 2009

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Recommended citation: Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan Yang, Xuan Zeng, "Statistical reliability analysis under process variation and aging effects." In the proceedings of Proceedings of the 46th Annual Design Automation Conference, 2009.

An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits

Published in In the proceedings of 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), 2010

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Recommended citation: Xiaoda Pan, Fan Yang, Xuan Zeng, Yangfeng Su, "An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits." In the proceedings of 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), 2010.

BMF-BD: Bayesian model fusion on Bernoulli distribution for efficient yield estimation of integrated circuits

Published in In the proceedings of Proceedings of the 51st Annual Design Automation Conference, 2014

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Recommended citation: Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li, "BMF-BD: Bayesian model fusion on Bernoulli distribution for efficient yield estimation of integrated circuits." In the proceedings of Proceedings of the 51st Annual Design Automation Conference, 2014.

Efficient statistical timing analysis for circuits with post-silicon tunable buffers

Published in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2014

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Recommended citation: Xingbao Zhou, Fan Yang, Hai Zhou, Min Gong, Hengliang Zhu, Ye Zhang, Xuan Zeng, "Efficient statistical timing analysis for circuits with post-silicon tunable buffers." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2014.

Efficient bit error rate estimation for high-speed link by Bayesian model fusion

Published in In the proceedings of 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015

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Recommended citation: Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Xin Li, Chenjie Gu, "Efficient bit error rate estimation for high-speed link by Bayesian model fusion." In the proceedings of 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015.

Efficient multivariate moment estimation via Bayesian model fusion for analog and mixed-signal circuits

Published in In the proceedings of Proceedings of the 52nd Annual Design Automation Conference, 2015

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Recommended citation: Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li, "Efficient multivariate moment estimation via Bayesian model fusion for analog and mixed-signal circuits." In the proceedings of Proceedings of the 52nd Annual Design Automation Conference, 2015.

MOS table models for fast and accurate simulation of analog and mixed-signal circuits using efficient oscillation-diminishing interpolations

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015

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Recommended citation: Xiao Li, Fan Yang, Dake Wu, Zhenya Zhou, Xuan Zeng, "MOS table models for fast and accurate simulation of analog and mixed-signal circuits using efficient oscillation-diminishing interpolations." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015.

Multi-parameter clock skew scheduling

Published in Integration, 2015

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Recommended citation: Xingbao Zhou, Wai-Shing Luk, Hai Zhou, Fan Yang, Changhao Yan, Xuan Zeng, "Multi-parameter clock skew scheduling." Integration, 2015.

PGMOR: An efficient model order reduction method for power grids

Published in In the proceedings of 2015 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics), 2015

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Recommended citation: Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng, "PGMOR: An efficient model order reduction method for power grids." In the proceedings of 2015 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics), 2015.

An efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation

Published in In the proceedings of 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 2016

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Recommended citation: Chenjie Yang, Fan Yang, Xuan Zeng, Dian Zhou, "An efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation." In the proceedings of 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 2016.

Efficient memory partitioning for parallel data access via data reuse

Published in In the proceedings of Proceedings of the 2016 ACM/SIGDA international symposium on field-programmable gate arrays, 2016

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Recommended citation: Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou, "Efficient memory partitioning for parallel data access via data reuse." In the proceedings of Proceedings of the 2016 ACM/SIGDA international symposium on field-programmable gate arrays, 2016.

Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data

Published in In the proceedings of 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016

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Recommended citation: Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng, Dian Zhou, "Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data." In the proceedings of 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016.

Efficient performance modeling of analog integrated circuits via kernel density based sparse regression

Published in In the proceedings of Proceedings of the 53rd Annual Design Automation Conference, 2016

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Recommended citation: Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li, "Efficient performance modeling of analog integrated circuits via kernel density based sparse regression." In the proceedings of Proceedings of the 53rd Annual Design Automation Conference, 2016.

Efficient performance modeling via dual-prior Bayesian model fusion for analog and mixed-signal circuits

Published in In the proceedings of Proceedings of the 53rd Annual Design Automation Conference, 2016

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Recommended citation: Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li, "Efficient performance modeling via dual-prior Bayesian model fusion for analog and mixed-signal circuits." In the proceedings of Proceedings of the 53rd Annual Design Automation Conference, 2016.

Fast compressive sensing reconstruction algorithm on FPGA using orthogonal matching pursuit

Published in In the proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016

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Recommended citation: Zhelun Yu, Jincheng Su, Fan Yang, Yangfeng Su, Xuan Zeng, Dian Zhou, Weiping Shi, "Fast compressive sensing reconstruction algorithm on FPGA using orthogonal matching pursuit." In the proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016.

High-speed link verification based on statistical inference

Published in In the proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016

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Recommended citation: Xuan Zeng, Chenlei Fang, Qicheng Huang, Fan Yang, Dian Zhou, Wei Cai, Weiping Shi, "High-speed link verification based on statistical inference." In the proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016.

A grid-based detailed routing algorithm for advanced 1D process

Published in In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017

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Recommended citation: Ye Zhang, Fan Yang, Dian Zhou, Xuan Zeng, Xiangdong Hu, "A grid-based detailed routing algorithm for advanced 1D process." In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017.

Efficient SVM-based hotspot detection using spectral clustering

Published in In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017

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Recommended citation: Fan Yang, Charles Chiang, Xuan Zeng, Dian Zhou, "Efficient SVM-based hotspot detection using spectral clustering." In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017.

Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis

Published in In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017

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Recommended citation: Shuhan Zhang, Fan Yang, Xuan Zeng, Dian Zhou, Shun Li, Xiangdong Hu, "Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis." In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017.

Efficient yield optimization for analog and SRAM circuits via Gaussian process regression and adaptive yield estimation

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017

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Recommended citation: Mengshuo Wang, Wenlong Lv, Fan Yang, Changhao Yan, Wei Cai, Dian Zhou, Xuan Zeng, "Efficient yield optimization for analog and SRAM circuits via Gaussian process regression and adaptive yield estimation." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017.

Layout decomposition for hybrid E-beam and DSA double patterning lithography

Published in In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017

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Recommended citation: Yunfeng Yang, Fan Yang, Wai-Shing Luk, Changhao Yan, Xuan Zeng, Xiangdong Hu, "Layout decomposition for hybrid E-beam and DSA double patterning lithography." In the proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017.

Network flow based cut redistribution and insertion for advanced 1D layout design

Published in In the proceedings of 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017

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Recommended citation: Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng, "Network flow based cut redistribution and insertion for advanced 1D layout design." In the proceedings of 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017.

Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits

Published in In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017

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Recommended citation: Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits." In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017.

An efficient data reuse strategy for multi-pattern data access

Published in In the proceedings of 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018

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Recommended citation: Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou, "An efficient data reuse strategy for multi-pattern data access." In the proceedings of 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018.

Multi-objective bayesian optimization for analog/rf circuit synthesis

Published in In the proceedings of Proceedings of the 55th Annual Design Automation Conference, 2018

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Recommended citation: Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "Multi-objective bayesian optimization for analog/rf circuit synthesis." In the proceedings of Proceedings of the 55th Annual Design Automation Conference, 2018.

An efficient multi-fidelity bayesian optimization approach for analog circuit synthesis

Published in In the proceedings of Proceedings of the 56th Annual Design Automation Conference 2019, 2019

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Recommended citation: Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu, "An efficient multi-fidelity bayesian optimization approach for analog circuit synthesis." In the proceedings of Proceedings of the 56th Annual Design Automation Conference 2019, 2019.

Bayesian optimization approach for analog circuit synthesis using neural network

Published in In the proceedings of 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019

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Recommended citation: Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "Bayesian optimization approach for analog circuit synthesis using neural network." In the proceedings of 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019.

Efficient layout hotspot detection via binarized residual neural network

Published in In the proceedings of Proceedings of the 56th Annual Design Automation Conference 2019, 2019

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Recommended citation: Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng, "Efficient layout hotspot detection via binarized residual neural network." In the proceedings of Proceedings of the 56th Annual Design Automation Conference 2019, 2019.

Efficient performance trade-off modeling for analog circuit based on Bayesian neural network

Published in In the proceedings of 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019

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Recommended citation: Zhengqi Gao, Jun Tao, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng, "Efficient performance trade-off modeling for analog circuit based on Bayesian neural network." In the proceedings of 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019.

Faster region-based hotspot detection

Published in In the proceedings of Proceedings of the 56th Annual Design Automation Conference 2019, 2019

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Recommended citation: Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Xuan Zeng, Bei Yu, "Faster region-based hotspot detection." In the proceedings of Proceedings of the 56th Annual Design Automation Conference 2019, 2019.

Learning Sparse Patterns in Deep Neural Networks

Published in In the proceedings of 2019 IEEE 13th International Conference on ASIC (ASICON), 2019

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Recommended citation: Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng, "Learning Sparse Patterns in Deep Neural Networks." In the proceedings of 2019 IEEE 13th International Conference on ASIC (ASICON), 2019.

Parallel Global Placement on CPU via Parallel Reduction

Published in In the proceedings of 2019 IEEE 13th International Conference on ASIC (ASICON), 2019

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Recommended citation: Huaidong Gao, Fan Yang, Dian Zhou, Xuan Zeng, "Parallel Global Placement on CPU via Parallel Reduction." In the proceedings of 2019 IEEE 13th International Conference on ASIC (ASICON), 2019.

A mixed-variable Bayesian optimization approach for analog circuit synthesis

Published in In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020

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Recommended citation: Jialin Lu, Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng, "A mixed-variable Bayesian optimization approach for analog circuit synthesis." In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.

An efficient and robust yield optimization method for high-dimensional SRAM circuits

Published in In the proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC), 2020

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Recommended citation: Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng, "An efficient and robust yield optimization method for high-dimensional SRAM circuits." In the proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC), 2020.

An efficient bayesian optimization approach for analog circuit synthesis via sparse gaussian process modeling

Published in In the proceedings of 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2020

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Recommended citation: Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "An efficient bayesian optimization approach for analog circuit synthesis via sparse gaussian process modeling." In the proceedings of 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2020.

Bayesian methods for the yield optimization of analog and SRAM circuits

Published in In the proceedings of 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 2020

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Recommended citation: Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng, "Bayesian methods for the yield optimization of analog and SRAM circuits." In the proceedings of 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 2020.

Hotspot detection via attention-based deep layout metric learning

Published in In the proceedings of Proceedings of the 39th International Conference on Computer-Aided Design, 2020

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Recommended citation: Hao Geng, Haoyu Yang, Lu Zhang, Jin Miao, Fan Yang, Xuan Zeng, Bei Yu, "Hotspot detection via attention-based deep layout metric learning." In the proceedings of Proceedings of the 39th International Conference on Computer-Aided Design, 2020.

Learning low-rank structured sparsity in recurrent neural networks

Published in In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020

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Recommended citation: Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng, "Learning low-rank structured sparsity in recurrent neural networks." In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.

A robust batch Bayesian optimization for analog circuit synthesis via local penalization

Published in In the proceedings of Proceedings of the 26th Asia and South Pacific Design Automation Conference, 2021

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Recommended citation: Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "A robust batch Bayesian optimization for analog circuit synthesis via local penalization." In the proceedings of Proceedings of the 26th Asia and South Pacific Design Automation Conference, 2021.

An efficient batch-constrained bayesian optimization approach for analog circuit synthesis via multiobjective acquisition ensemble

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021

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Recommended citation: Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "An efficient batch-constrained bayesian optimization approach for analog circuit synthesis via multiobjective acquisition ensemble." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021.

Bayesian optimization approach for analog circuit design using multi-task Gaussian process

Published in In the proceedings of 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021

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Recommended citation: Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "Bayesian optimization approach for analog circuit design using multi-task Gaussian process." In the proceedings of 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.

Hotspot detection via multi-task learning and transformer encoder

Published in In the proceedings of 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021

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Recommended citation: Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin Wong, "Hotspot detection via multi-task learning and transformer encoder." In the proceedings of 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021.

Recursive disentanglement network

Published in In the proceedings of International Conference on Learning Representations, 2021

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Recommended citation: Yixuan Chen, Yubin Shi, Dongsheng Li, Yujiang Wang, Mingzhi Dong, Yingying Zhao, Robert Dick, Qin Lv, Fan Yang, Li Shang, "Recursive disentanglement network." In the proceedings of International Conference on Learning Representations, 2021.

When wafer failure pattern classification meets few-shot learning and self-supervised learning

Published in In the proceedings of 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021

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Recommended citation: Hao Geng, Fan Yang, Xuan Zeng, Bei Yu, "When wafer failure pattern classification meets few-shot learning and self-supervised learning." In the proceedings of 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021.

A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion

Published in In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022

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Recommended citation: Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng, "A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion." In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022.

A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench

Published in In the proceedings of 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022

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Recommended citation: Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou, "A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench." In the proceedings of 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022.

A batched Bayesian optimization approach for analog circuit synthesis via multi-fidelity modeling

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022

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Recommended citation: Biao He, Shuhan Zhang, Yifan Wang, Tianning Gao, Fan Yang, Changhao Yan, Dian Zhou, Zhaori Bi, Xuan Zeng, "A batched Bayesian optimization approach for analog circuit synthesis via multi-fidelity modeling." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022.

Adversarial Sample Generation for Lithography Hotspot Detection

Published in In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022

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Recommended citation: Shuyuan Sun, Yiyang Jiang, Fan Yang, Xuan Zeng, "Adversarial Sample Generation for Lithography Hotspot Detection." In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022.

An Automated Compiler for RISC-V Based DNN Accelerator

Published in In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022

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Recommended citation: Zheng Wu, Wuzhen Xie, Xiaoling Yi, Haitao Yang, Ruiyao Pu, Xiankui Xiong, Haidong Yao, Chixiao Chen, Jun Tao, Fan Yang, "An Automated Compiler for RISC-V Based DNN Accelerator." In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022.

An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling

Published in In the proceedings of Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022

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Recommended citation: Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng, "An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling." In the proceedings of Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022.

Efficient hotspot detection via graph neural network

Published in In the proceedings of 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022

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Recommended citation: Shuyuan Sun, Yiyang Jiang, Fan Yang, Bei Yu, Xuan Zeng, "Efficient hotspot detection via graph neural network." In the proceedings of 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022.

Efficient layout hotspot detection via neural architecture search

Published in ACM Transactions on Design Automation of Electronic Systems (TODAES), 2022

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Recommended citation: Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng, "Efficient layout hotspot detection via neural architecture search." ACM Transactions on Design Automation of Electronic Systems (TODAES), 2022.

Floorplanning with graph attention

Published in In the proceedings of Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022

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Recommended citation: Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang, "Floorplanning with graph attention." In the proceedings of Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022.

Graphplanner: Floorplanning with graph neural network

Published in ACM Transactions on Design Automation of Electronic Systems, 2022

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Recommended citation: Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang, "Graphplanner: Floorplanning with graph neural network." ACM Transactions on Design Automation of Electronic Systems, 2022.

LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces

Published in In the proceedings of Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 2022

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Recommended citation: Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, "LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces." In the proceedings of Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 2022.

NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models

Published in In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022

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Recommended citation: Xiaoling Yi, Jiangnan Yu, Zheng Wu, Xiankui Xiong, Dong Xu, Chixiao Chen, Jun Tao, Fan Yang, "NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models." In the proceedings of 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022.

Topology optimization of operational amplifier in continuous space via graph embedding

Published in In the proceedings of 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022

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Recommended citation: Jialin Lu, Liangbo Lei, Fan Yang, Li Shang, Xuan Zeng, "Topology optimization of operational amplifier in continuous space via graph embedding." In the proceedings of 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022.

VECBEE: A versatile efficiency–accuracy configurable batch error estimation method for greedy approximate logic synthesis

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022

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Recommended citation: Sanbao Su, Chang Meng, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, Weikang Qian, "VECBEE: A versatile efficiency--accuracy configurable batch error estimation method for greedy approximate logic synthesis." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022.

An analog circuit building block generator via nested multi-fidelity modeling

Published in IEEE Transactions on Circuits and Systems I: Regular Papers, 2023

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Recommended citation: Jiangli Huang, Chuyu Wang, Yuyang Yan, Cong Tao, Fan Yang, Changhao Yan, Wenchuang Hu, Dian Zhou, Xuan Zeng, "An analog circuit building block generator via nested multi-fidelity modeling." IEEE Transactions on Circuits and Systems I: Regular Papers, 2023.

Automated and Agile Design of Layout Hotspot Detector via Neural Architecture Search

Published in In the proceedings of 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023

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Recommended citation: Zihao Chen, Fan Yang, Li Shang, Xuan Zeng, "Automated and Agile Design of Layout Hotspot Detector via Neural Architecture Search." In the proceedings of 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023.

Automatic Op-Amp Generation From Specification to Layout

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023

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Recommended citation: Jialin Lu, Liangbo Lei, Jiangli Huang, Fan Yang, Li Shang, Xuan Zeng, "Automatic Op-Amp Generation From Specification to Layout." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023.

Efficient ILT via multi-level lithography simulation

Published in In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023

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Recommended citation: Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng, "Efficient ILT via multi-level lithography simulation." In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023.

Efficient Model-Based OPC via Graph Neural Network

Published in In the proceedings of 2023 International Symposium of Electronics Design Automation (ISEDA), 2023

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Recommended citation: Shuyuan Sun, Xuelian Chen, Fan Yang, Bei Yu, Shang Li, Xuan Zeng, "Efficient Model-Based OPC via Graph Neural Network." In the proceedings of 2023 International Symposium of Electronics Design Automation (ISEDA), 2023.

FPDsim: a structural simulator for power grid analysis of flat panel display

Published in In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023

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Recommended citation: Chengtao An, Chunqiao Li, Xiangqi Li, Yangfeng Su, Fan Yang, Xuan Zeng, "FPDsim: a structural simulator for power grid analysis of flat panel display." In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023.

Graph representation learning for microarchitecture design space exploration

Published in In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023

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Recommended citation: Xiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu, Li Shang, Fan Yang, "Graph representation learning for microarchitecture design space exploration." In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023.

Improve Sparse Implicit Projection Via Incomplete Cholesky Factorization

Published in In the proceedings of 2023 China Semiconductor Technology International Conference (CSTIC), 2023

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Recommended citation: Yang Yang, Fan Yang, Xuan Zeng, "Improve Sparse Implicit Projection Via Incomplete Cholesky Factorization." In the proceedings of 2023 China Semiconductor Technology International Conference (CSTIC), 2023.

L2O-ILT: Learning to optimize inverse lithography techniques

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023

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Recommended citation: Binwu Zhu, Su Zheng, Ziyang Yu, Guojin Chen, Yuzhe Ma, Fan Yang, Bei Yu, Martin Wong, "L2O-ILT: Learning to optimize inverse lithography techniques." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023.

Sphinx: A Hybrid Boolean Processor-FPGA Hardware Emulation System

Published in In the proceedings of 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023

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Recommended citation: Ruiyao Pu, Yiwei Sun, Pei-Hsin Ho, Fan Yang, Li Shang, Xuan Zeng, "Sphinx: A Hybrid Boolean Processor-FPGA Hardware Emulation System." In the proceedings of 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023.

Structure-Preserving Model Order Reduction for Thermal Analysis

Published in In the proceedings of 2023 International Symposium of Electronics Design Automation (ISEDA), 2023

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Recommended citation: Yang Yang, Fan Yang, Xuan Zeng, "Structure-Preserving Model Order Reduction for Thermal Analysis." In the proceedings of 2023 International Symposium of Electronics Design Automation (ISEDA), 2023.

TOTAL: Topology Optimization of Operational Amplifier via Reinforcement Learning

Published in In the proceedings of 2023 24th International Symposium on Quality Electronic Design (ISQED), 2023

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Recommended citation: Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng, "TOTAL: Topology Optimization of Operational Amplifier via Reinforcement Learning." In the proceedings of 2023 24th International Symposium on Quality Electronic Design (ISQED), 2023.

Unleashing the Power of Graph Spectral Sparsification for Power Grid Analysis via Incomplete Cholesky Factorization

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023

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Recommended citation: Chunqiao Li, Chengtao An, Zhengqi Gao, Fan Yang, Yangfeng Su, Xuan Zeng, "Unleashing the Power of Graph Spectral Sparsification for Power Grid Analysis via Incomplete Cholesky Factorization." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023.

Yield Optimization for Analog Circuits over Multiple Corners via Bayesian Neural Networks: Enhancing Circuit Reliability under Environmental Variation

Published in ACM Transactions on Design Automation of Electronic Systems, 2023

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Recommended citation: Nanlin Guo, Fulin Peng, Jiahe Shi, Fan Yang, Jun Tao, Xuan Zeng, "Yield Optimization for Analog Circuits over Multiple Corners via Bayesian Neural Networks: Enhancing Circuit Reliability under Environmental Variation." ACM Transactions on Design Automation of Electronic Systems, 2023.

cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis

Published in In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023

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Recommended citation: Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng, "cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis." In the proceedings of 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023.

ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024

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Recommended citation: Jinyi Shen, Fan Yang, Li Shang, Changhao Yan, Zhaori Bi, Dian Zhou, Xuan Zeng, "ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024.

D3PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing

Published in ACM Transactions on Design Automation of Electronic Systems, 2024

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Recommended citation: Aidong Zhao, Tianchen Gu, Zhaori Bi, Fan Yang, Changhao Yan, Xuan Zeng, Zixiao Lin, Wenchuang Hu, Dian Zhou, "D3PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing." ACM Transactions on Design Automation of Electronic Systems, 2024.

Efficient ILT via Multigrid-Schwartz Method

Published in In the proceedings of Design Automation Conference 2024, 2024

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Recommended citation: Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Dian Zhou, Xuan Zeng, "Efficient ILT via Multigrid-Schwartz Method." In the proceedings of Design Automation Conference 2024, 2024.

FSMM: An Efficient Matrix Multiplication Accelerator Supporting Flexible Sparsity

Published in In the proceedings of IEEE International Conference on Computer-Aided Design (ICCAD), 2024

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Recommended citation: Yuxuan Qiao, Fan Yang, Yecheng Zhang, Xiankui Xiong, Xiao Yao, Haidong Yao, "FSMM: An Efficient Matrix Multiplication Accelerator Supporting Flexible Sparsity." In the proceedings of IEEE International Conference on Computer-Aided Design (ICCAD), 2024.

MACRO: Multi-agent Reinforcement Learning-based Cross-layer Optimization of Operational Amplifier

Published in In the proceedings of 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 2024

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Recommended citation: Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng, "MACRO: Multi-agent Reinforcement Learning-based Cross-layer Optimization of Operational Amplifier." In the proceedings of 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 2024.

SenseDSE: Sensitivity-Based Performance Evaluation for Design Space Exploration of Microarchitecture

Published in In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2024

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Recommended citation: Zheng Wu, Xiaoling Yi, Li Shang, Fan Yang, "SenseDSE: Sensitivity-Based Performance Evaluation for Design Space Exploration of Microarchitecture." In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2024.

TL‑CSE: Microarchitecture‑Compiler Co‑design Space Exploration via Transfer Learning

Published in In the proceedings of 30st Asia and South Pacific design automation conference (ASP-DAC), 2024

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Recommended citation: Zheng Wu, Jinyi Shen, Xuyang Zhao, Changxu Liu, Li Shang, Fan Yang, "TL‑CSE: Microarchitecture‑Compiler Co‑design Space Exploration via Transfer Learning." In the proceedings of 30st Asia and South Pacific design automation conference (ASP-DAC), 2024.

DAMIL-DCIM: A Digital CIM Layout Synthesis Framework with Dataflow-Aware Floorplan and MILP-Based Detailed Placement

Published in In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025

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Recommended citation: Chuyu Wang, Ke Hu, Fan Yang, Keren Zhu, Xuan Zeng, "DAMIL-DCIM: A Digital CIM Layout Synthesis Framework with Dataflow-Aware Floorplan and MILP-Based Detailed Placement." In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025.

ELMap: Area-Driven LUT Mapping with k-LUT Network Exact Synthesis

Published in In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025

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Recommended citation: Hongyang Pan, Keren Zhu, Fan Yang, Zhufei Chu, Xuan Zeng, "ELMap: Area-Driven LUT Mapping with k-LUT Network Exact Synthesis." In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025.

GTN-Cell: Efficient Standard Cell Characterization Using Graph Transformer Network

Published in In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025

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Recommended citation: Lihao Liu, Beisi Lu, Yunhui Li, Li Shang, Fan Yang, "GTN-Cell: Efficient Standard Cell Characterization Using Graph Transformer Network." In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025.

INTO-OA: Interpretable Topology Optimization for Operational Amplifiers

Published in In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025

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Recommended citation: Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng, "INTO-OA: Interpretable Topology Optimization for Operational Amplifiers." In the proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025.

students

talks

teaching

Programming

Undergraduate course, Fudan University, School of Microelectronics, 2023

This course focus on the basic concepts of C programming language, the basic data structures and the programming skills using C.

Fundamentals of Design Automation of Integrated Circuits

Undergraduate Course, Fudan University, School of Microelectronics, 2024

The course focuses on the fundamental theories of digital integrated circuit design automation and the key algorithms involved in commercial EDA tools, including: scheduling and binding algorithms in high-level synthesis; logic synthesis and optimization methods; standard cell libraries; physical design algorithms for partitioning, placement, and routing; and timing analysis.